Check out the veriT solver web site!

Consider submitting and participating to the following events:

If you have strong motivations to work as an Internship Student, PhD Student, or as a PostDoc in our team, e.g. on SMT or verification of distributed systems, please us as soon as possible.

General Info

Address
LORIA
Équipe VeriDis, Bât B
615, rue du Jardin Botanique
F-54602 Villers-lès-Nancy
France
Office
B 262 (second floor)
Email

Internet mail is an asynchronous and unreliable communication medium.
Please consider using phone for important and/or urgent messages.
Phone
+33 354 95 84 78
Fax
+33 383 41 30 79
Interests (Research)
Verification of distributed algorithms
Cooperation of deduction tools
Satisfiability Modulo theories
Combination of theories

Publications

Thesis

Papers