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ELEN0040-1 : Digital Electronics

 

Course Objectives

Giving the fundamentals of digital circuits and illustrating their use by the study of a computer circuits.

cf. Programme des cours 2016-2017

Subjects covered: Numbers and binary codes; Logical algebra; Combinational circuits; Simplification and various implementations of integrated circuits; Sequential circuits; Registers and counters; Transfers between registers, buses, memories and programmable circuits; Part operative; Machine instruction formats; Execution of an instruction; IO operations.

Reference BookLogic and Computer Design Fundamentals (4th Edition), by M. Morris Mano and Charles R. Kime  -  Chapters 1 to 10

 

Course Organization

Theory lessons: Thursday afternoon 13:45 - 15:30. (in English), Room: R30 (B6d)

Tutorials: 6 sessions of supervised exercises (Tutorials) on thursday afternoon 15:45 - 17:45,
Tutorials: Rooms: T1-2: S24 & S32 (B5b) ; T3,4,6: S24 & S30 (B5b) ; T5: R30 (B6d)
Tutorials: 2 sessions of Introduction to VHDL: 15:45 - 17:45, Room:
R30 (B6d) (in French)
Tutorials: 2 practical sessions (Labs) and 1 project. (in French)

Interrogations: 15:45 - 17:45. (in French), Room: 202 (B7b)

Schedule

  • 09. Feb: Lecture 1, Tutorial 1
  • 16. Feb: Lecture 2 + Lab Intro, Tutorial 2
  • 23. Feb: Lecture 3, Tutorial 3
  • 02. March: Lecture 4, Tutorial VHDL 1
  • 09. March: Lecture 5, Tutorial VHDL 2
  • 16. March: Lecture 6, Tutorial 4
  • 23. March: Lecture 7, Tutorial 5
  • 30. March: Lecture 8, Interrogation 1
  • 20. April: Lecture 9, Tutorial 6
  • 27. April: Lecture 10, Interrogation 2 (room: 202/B7b)
  • 04. May: Lecture 11
  • 11. May: reserve, tba

 

Theory Classes

Slides

  • Lesson 1 : Introduction, Boolean algebra and combinational logic
  • Lesson 2 : Design of combinatorial circuits and function simplification by Karnaugh maps
  • Lesson 3 : Combinational Logic Circuits (1) - Combinational Functional Blocks
  • Lesson 4 : Combinational Logic Circuits (2) - Arithmetic Functions ; Sequential circuits (1)
  • Lesson 5 : Sequential circuits (2) - Latches and Flip-Flops
  • Lesson 6 : Sequential circuits (3) - Design ; Timing issues
  • Lesson 7 : Sequential circuits (4) - Timing issues ; Registers and Counters
  • Lesson 8 : Registers and Counters
  • Lesson 9 : Memory basics

 

Tutorials

Suggested exercises : all_repet.pdf

Exercises Slides

  • Tutorial 1 - Solutions: Boolean algebra and function implementation
  • Tutorial 2Solutions: Karnaugh maps
  • Tutorial 3Solutions* - ex suppl. 37: Combinational circuits analysis
  • Tutorial 4Solutions: Synthesis of combinational circuits
  • Tutorial 5Solutions: Sequential systems analysis
  • Tutorial 6Solutions: Synthesis of sequential circuits

    *Corr.- Ex.35: S1_(mux2) = S_(HA2) = X xor not(A)

  • VHDL

    • VHDL Tutorial 1

     

    Practical sessions - Labs (R100 montéfiore)

    Introduction au projet VHDL : Implémentation de fonctions simples par circuits intégrés standards et de petits systèmes par circuits programmables (PLD).

    • Présence OBLIGATOIRE
    • 2 labos de 4h
    • Par groupe de 4 étudiants (un délégué par groupe)
    • Horaire à fixer avec les étudiants-moniteurs
    • Labo 0 : Introduction au matériel de laboratoire et aux règles de sécurité - 23/02/17
    • Labo 1 : Introduction aux composants logiques
    • Labo 2 : prise en main d'une CPLD

     

    Interrogations

    Interro 1 - Results - Correction

    • All content of tutorials 1 to 4
    • One question of combinational circuit analysis
    • One question of combinational circuit synthesis
    • One question about VHDL
    • Allowed documents : provided summary (formulaire1.pdf) only

    Interro 2 - Results - Correction

    • All content of tutorials 5 and 6
    • One question of sequential circuit analysis
    • One question of sequential circuit synthesis
    • One question about VHDL
    • Allowed documents : provided summary (formulaire2.pdf) only

     

    Examination

    Theory part

    Exercises part

    • Exempted if both Interro 1 & Interro 2 are > 12/20
    • All content of tutorials
    • No VHDL
    • Allowed documents : provided summary (formulaire.pdf) only


    Grades weighting formula

    • Laboratory: 10%
    • Project: 30%
    • Theory exam: 30%
    • Exercices exam: 0% if exempted, 20% otherwise
    • Interrogations: 30% if exempted from exercises exam, 10% otherwise

     

    Contacts

    Theory :
    Michael Kraft: Institut Montefiore (B28) I.83b, m.kraft@ulg.ac.be

    Tutorials:
    Delphine Cerica: Institut Montefiore (B28) I.85a, dcerica@ulg.ac.be
    Quentin Massoz: Institut Montefiore (B28) R137, quentin.massoz@ulg.ac.be

    Labs and project:
    Thomas Schmitz: Institut Montefiore (B28) I.81a, T.Schmitz@ulg.ac.be

    Liste des cours

    Université de Liège | Faculté des Sciences Appliquées | Département Montefiore
    Electronics, Microsystems, Measurements, and Instrumentation (EMMI)