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ELEN0040-1 : Digital Electronics

 

Course Objectives

At the end of the course, students will master the fundamentals of the design of digital circuits.

cf. Programme des cours

Subjects covered: Numbers and binary codes, boolean algebra, combinational circuits (simplification, implementation with programmable circuits), synchronous sequential circuits (registers, counters, implementation with programmable circuits), bus, memories, processing units and controllers. VHDL langage is used throughout the course.

Reference BookLogic and Computer Design Fundamentals (4th Edition), by M. Morris Mano and Charles R. Kime  -  Chapters 1 to 10

 

Course Organization

10 Theory lessons: Wednesday morning 8:00 - 09:45 (in French with slides in English), Room: A142 (B7b)

2 sessions of Introduction to VHDL: 10:00 - 12:00, Room: A142 (B7b) (in French)

6 sessions of Tutorials (supervised exercises) on wednesday morning 10:00 - 12:00 (in French),
Rooms distribution: Group 1 (names from A → Ewbank (incl.)), Group 2 (Fares → Morre (incl.)), Group 3 (Morenne → Z)
Tutorials:
2 practical sessions (Labs) and 1 project (in French)

Schedule

  • 06. Feb:   Lecture 1&2 + Lab Intro (room: A142 (B7b))
  • 13. Feb:   Cancelled
  • 20. Feb:   Lecture 3,   Intro VHDL 1 (room: A142 (B7b))
  • 27. Feb:   Lecture 4,   Tutorial 1   (rooms: R.54 (B4)S.38 (B6d), Marx (B31))
  • 06. Mar:   Lecture 5 (room: 204 (B4)),   Intro VHDL 2 (room: 204 (B4))
  • 13. Mar:   Lecture 6,   Tutorial 2   (rooms: R.54 (B4)R.53 (B4)A.2 (B7a))
  • 20. Mar:   Lecture 7,   Tutorial 3   (rooms: R.54 (B4)R.53 (B4)S.38 (B6d))
  • 27. Mar:   Lecture 8,   Tutorial 4   (rooms: R.54 (B4)A.2 (B7a)R.53 (B4))
  • 03. Apr:   8:30-10:30: TD 1 (room: 204 (B4)), 10:30-12:00: Q&A Session Th+Ex (room: 204 (B4))
  • 24. Apr:   Lecture 9,   Tutorial 5   (rooms: R.54 (B4)R.53 (B4)S.34 (B5b))
  • 08. May:   Lecture 10 (room: Portalis (B31)),   Tutorial 6   (rooms: R.54 (B4)R.52 (B4)R.53 (B4))
  • 15. May:   8:30-12:00TD 2 + Q&A Session (room: Domat (B31))

 

Lectures

Theory Slides !not up to date!

  • Lesson 1: Introduction, Boolean algebra and combinational logic
  • Lesson 2: Design of combinatorial circuits and function simplification by Karnaugh maps
  • Lesson 3: Combinational Logic Circuits (1) - Combinational Functional Blocks
  • Lesson 4: Combinational Logic Circuits (2) - Arithmetic Functions ; Sequential circuits (1)
  • Lesson 5: Sequential circuits (2) - Latches and Flip-Flops
  • Lesson 6: Sequential circuits (3) - Design ; Timing issues
  • Lesson 7: Sequential circuits (4) - Timing issues ; Registers and Counters
  • Lesson 8: Registers, counters and register transfers
  • Lesson 9: Memory basics

 

Tutorials

Suggested exercises : all_repet.pdf

Exercises Slides

  • Tutorial 1 - Solution: Boolean algebra and function implementation
  • Tutorial 2Solution: Karnaugh maps
  • Tutorial 3Solution: Combinational circuits analysis
  • Tutorial 4Solution: Synthesis of combinational circuits
  • TD 1 - Enoncé - Solution: Combinational logic
  • Tutorial 5Solution: Sequential systems analysis
  • Tutorial 6SolutionEx 21 Moore: Synthesis of sequential circuits
  • TD 2EnoncéSolution: Sequentiel logic

  • VHDL

     

    N-HITec Presentation

     

    Practical sessions - Labs & Project

    Introduction au projet VHDL : Implémentation de fonctions simples par circuits intégrés standards et de petits systèmes par circuits programmables (PLD).

    • Présence OBLIGATOIRE
    • 2 labos de 4h
    • Par groupe de 4 étudiants (un délégué par groupe)
    • Locaux : R100 (Montefiore)

    Labs - !A lire avant les laboratoires!

    • Labo 0 : Introduction au matériel de laboratoire et aux règles de sécurité
    • Labo 1 : Introduction aux composants logiques
    • Labo 2 : prise en main d'une CPLD

    Laboratory schedule

  • schedule
  • Q&A sessions

  • 22/03: 12h45, 1.18
  • Project Groups

  • Groups
  •  

    Examination

    Theory part

    Exercises part

    • All content of tutorials
    • One question about Karnaugh and combinational function implementation
    • One question about sequential circuit analysis
    • One question about sequential circuit synthesis


    Grades weighting

    • Project (+Labs): 40%
    • Theory exam: 30%
    • Exercises exam: 30%

     

    Contacts

    Theory:
    Prof. Jean-Michel Redouté: Institut Montefiore (B28) I.83b, jean-michel.redoute@uliege.be

    Tutorials:
    Loïc Burger:
    Institut Montefiore (B28) 1.84a, lburger@uliege.be
    Delphine Cerica
    : Institut Montefiore (B28) 1.85a, dcerica@uliege.be
    Anaïs Halin: Institut Montefiore (B28), 2.99, Anais.Halin@uliege.be

    Labs and project:
    Thibaud Peers: Institut Montefiore (B28), R14.a, Thibaud.Peers@uliege.be

    Liste des cours

    Université de Liège | Faculté des Sciences Appliquées | Département Montefiore
    Electronics, Microsystems, Measurements, and Instrumentation (EMMI)